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<div class="header">
  <div class="summary">
<a href="#groups">API Reference</a> &#124;
<a href="#nested-classes">Data Structures</a> &#124;
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<a href="#enum-members">Enumerations</a> &#124;
<a href="#func-members">Functions</a>  </div>
  <div class="headertitle"><div class="title">QSPI (Quad Serial Peripheral Interface)<div class="ingroups"><a class="el" href="group__group__hal.html">HAL Drivers</a></div></div></div>
</div><!--header-->
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<a name="details" id="details"></a><h2 class="groupheader">General Description</h2>
<p >High level interface for interacting with the Quad-SPI interface. </p>
<p >QSPI is an SPI-based communication interface, often used with external memory devices. The QSPI driver supports sending and receiving commands to/from from another device via a single, dual, quad, or octal SPI interface.</p>
<h1><a class="anchor" id="subsection_qspi_features"></a>
Features</h1>
<ul>
<li>Standard SPI Master interface</li>
<li>Supports Single/Dual/Quad/Octal SPI memories</li>
<li>Supports Dual-Quad SPI mode</li>
<li>Execute-In-Place (XIP) from external Quad SPI Flash</li>
<li>Supports external serial memory initialization via Serial Flash Discoverable Parameters (SFDP) standard</li>
</ul>
<h1><a class="anchor" id="subsection_qspi_code_snippets"></a>
Code Snippets</h1>
<dl class="section note"><dt>Note</dt><dd>The following snippets show commands specific to the <a href="https://www.cypress.com/documentation/datasheets/s25fl512s-512-mbit-64-mbyte-30v-spi-flash-memory">S25FL512S Cypress NOR Flash device</a>. Refer to the datasheet of the external memory device for device specific memory commands. </dd></dl>
<h2><a class="anchor" id="subsection_qspi_snippet_1"></a>
Code Snippet 1: Initializing the cyhal_qspi_command_t structure</h2>
<p >The following code snip demonstrates an example for initializing the <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__command__t" title="QSPI command settings.">cyhal_qspi_command_t</a> structure for any given flash command. The <a class="el" href="group__group__hal__qspi.html#abd8ab651ee766c3c6d3dafe722a75110" title="Mode bits structure.">cyhal_qspi_command_t.mode_bits</a> structure has several other components which should be set as per the command. Mode bits are not required for single SPI read command, hence, mode_bits.disabled is set to TRUE in the below example code. </p><div class="fragment"><div class="line"><span class="comment">// Commands</span></div>
<div class="line"><span class="preprocessor">#define DEVICE_SPECIFIC_READ_COMMAND                    (0x03)</span></div>
<div class="line"> </div>
<div class="line"><span class="comment">// Defining QSPI command structure for READ command</span></div>
<div class="line"><a class="code hl_struct" href="group__group__hal__qspi.html#structcyhal__qspi__command__t">cyhal_qspi_command_t</a> device_specific_read_command =</div>
<div class="line">{</div>
<div class="line">    .<a class="code hl_variable" href="group__group__hal__qspi.html#adf9dd732169ddf6d4e965358c0307bcb">instruction</a>.bus_width      = <a class="code hl_enumvalue" href="group__group__hal__qspi.html#ggaddc93a79f0708fd53897d0c37bc7544bab14f0354fdb42ea40c30274df3eeb74f">CYHAL_QSPI_CFG_BUS_SINGLE</a>,    <span class="comment">// Bus width for the instruction</span></div>
<div class="line">    .instruction.data_rate      = <a class="code hl_enumvalue" href="group__group__hal__qspi.html#ggac30267a66618a021ee34be687fa1442cac5b17b7596a02b09061b622a7a379cdc">CYHAL_QSPI_DATARATE_SDR</a>,      <span class="comment">// Data rate for instruction</span></div>
<div class="line">                                                                <span class="comment">// (SDR/DDR)</span></div>
<div class="line">    .instruction.two_byte_cmd   = <span class="keyword">false</span>,                        <span class="comment">// command is 1-byte value</span></div>
<div class="line">    .instruction.value          = DEVICE_SPECIFIC_READ_COMMAND, <span class="comment">// Instruction value</span></div>
<div class="line">    .instruction.disabled       = <span class="keyword">false</span>,                        <span class="comment">// Instruction phase skipped if</span></div>
<div class="line">                                                                <span class="comment">// disabled</span></div>
<div class="line">                                                                <span class="comment">//   set to true</span></div>
<div class="line">    .address.bus_width          = <a class="code hl_enumvalue" href="group__group__hal__qspi.html#ggaddc93a79f0708fd53897d0c37bc7544bab14f0354fdb42ea40c30274df3eeb74f">CYHAL_QSPI_CFG_BUS_SINGLE</a>,    <span class="comment">// Bus width for the address</span></div>
<div class="line">    .address.data_rate          = <a class="code hl_enumvalue" href="group__group__hal__qspi.html#ggac30267a66618a021ee34be687fa1442cac5b17b7596a02b09061b622a7a379cdc">CYHAL_QSPI_DATARATE_SDR</a>,      <span class="comment">// Data rate for address (SDR/DDR)</span></div>
<div class="line">    .address.size               = <a class="code hl_enumvalue" href="group__group__hal__qspi.html#gga0633be58b4427d173d1f94c4e6e4e058a3255bb7d1a9fbf71e28c121df749135e">CYHAL_QSPI_CFG_SIZE_24</a>,       <span class="comment">// Address size in bits</span></div>
<div class="line">    .address.disabled           = <span class="keyword">false</span>,                        <span class="comment">// Address phase skipped if disabled</span></div>
<div class="line">                                                                <span class="comment">// set to true</span></div>
<div class="line">    .mode_bits.disabled         = <span class="keyword">true</span>,                         <span class="comment">// Mode bits phase skipped if</span></div>
<div class="line">                                                                <span class="comment">// disabled set to true</span></div>
<div class="line">    .dummy_cycles.dummy_count   = 0,                            <span class="comment">// Dummy cycles count</span></div>
<div class="line">    .data.bus_width             = <a class="code hl_enumvalue" href="group__group__hal__qspi.html#ggaddc93a79f0708fd53897d0c37bc7544bab14f0354fdb42ea40c30274df3eeb74f">CYHAL_QSPI_CFG_BUS_SINGLE</a>,    <span class="comment">// Bus width for data</span></div>
<div class="line">    .data.data_rate             = <a class="code hl_enumvalue" href="group__group__hal__qspi.html#ggac30267a66618a021ee34be687fa1442cac5b17b7596a02b09061b622a7a379cdc">CYHAL_QSPI_DATARATE_SDR</a>,      <span class="comment">// Data rate for data (SDR/DDR)</span></div>
<div class="line">};</div>
<div class="ttc" id="agroup__group__hal__qspi_html_adf9dd732169ddf6d4e965358c0307bcb"><div class="ttname"><a href="group__group__hal__qspi.html#adf9dd732169ddf6d4e965358c0307bcb">cyhal_qspi_command_t::instruction</a></div><div class="ttdeci">struct cyhal_qspi_command_t::@0 instruction</div><div class="ttdoc">Instruction structure.</div></div>
<div class="ttc" id="agroup__group__hal__qspi_html_gga0633be58b4427d173d1f94c4e6e4e058a3255bb7d1a9fbf71e28c121df749135e"><div class="ttname"><a href="group__group__hal__qspi.html#gga0633be58b4427d173d1f94c4e6e4e058a3255bb7d1a9fbf71e28c121df749135e">CYHAL_QSPI_CFG_SIZE_24</a></div><div class="ttdeci">@ CYHAL_QSPI_CFG_SIZE_24</div><div class="ttdoc">24 bits address</div><div class="ttdef"><b>Definition:</b> cyhal_qspi.h:153</div></div>
<div class="ttc" id="agroup__group__hal__qspi_html_ggac30267a66618a021ee34be687fa1442cac5b17b7596a02b09061b622a7a379cdc"><div class="ttname"><a href="group__group__hal__qspi.html#ggac30267a66618a021ee34be687fa1442cac5b17b7596a02b09061b622a7a379cdc">CYHAL_QSPI_DATARATE_SDR</a></div><div class="ttdeci">@ CYHAL_QSPI_DATARATE_SDR</div><div class="ttdoc">Single data rate.</div><div class="ttdef"><b>Definition:</b> cyhal_qspi.h:168</div></div>
<div class="ttc" id="agroup__group__hal__qspi_html_ggaddc93a79f0708fd53897d0c37bc7544bab14f0354fdb42ea40c30274df3eeb74f"><div class="ttname"><a href="group__group__hal__qspi.html#ggaddc93a79f0708fd53897d0c37bc7544bab14f0354fdb42ea40c30274df3eeb74f">CYHAL_QSPI_CFG_BUS_SINGLE</a></div><div class="ttdeci">@ CYHAL_QSPI_CFG_BUS_SINGLE</div><div class="ttdoc">Normal SPI Mode.</div><div class="ttdef"><b>Definition:</b> cyhal_qspi.h:142</div></div>
<div class="ttc" id="agroup__group__hal__qspi_html_structcyhal__qspi__command__t"><div class="ttname"><a href="group__group__hal__qspi.html#structcyhal__qspi__command__t">cyhal_qspi_command_t</a></div><div class="ttdoc">QSPI command settings.</div><div class="ttdef"><b>Definition:</b> cyhal_qspi.h:174</div></div>
</div><!-- fragment --> <h2><a class="anchor" id="subsection_qspi_snippet_2"></a>
Code Snippet 2: QSPI initialization and Reading Flash memory</h2>
<p >This example function demonstrates the initialization of the QSPI component and use of the <a class="el" href="group__group__hal__qspi.html#gaa82f8a18f5936ff7323d72574165190a" title="Receive a command and block of data, synchronously.">cyhal_qspi_read()</a> function to complete the read operation and receive the read data in a buffer. </p><div class="fragment"><div class="line">    <a class="code hl_typedef" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a>    result;</div>
<div class="line">    <a class="code hl_struct" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> qspi_object;</div>
<div class="line">    uint8_t      rx_buf[PACKET_SIZE];</div>
<div class="line">    <span class="keywordtype">size_t</span>       length = PACKET_SIZE;</div>
<div class="line"> </div>
<div class="line">    <a class="code hl_struct" href="group__group__hal__qspi.html#structcyhal__qspi__slave__pin__config__t">cyhal_qspi_slave_pin_config_t</a> memory_pin_set =</div>
<div class="line">    {</div>
<div class="line">        <span class="comment">// Memory data lines</span></div>
<div class="line">        .<a class="code hl_variable" href="group__group__hal__qspi.html#ab5692bbff73ecb9c1cf71aa23d203bc1">io</a>   = { CYBSP_QSPI_D0, CYBSP_QSPI_D1, CYBSP_QSPI_D2, CYBSP_QSPI_D3, <a class="code hl_enumvalue" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#gga707195ce0627016bf371643bdd9caa51a3dbd1016ea99d087d747530418b89a01">NC</a>, <a class="code hl_enumvalue" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#gga707195ce0627016bf371643bdd9caa51a3dbd1016ea99d087d747530418b89a01">NC</a>, <a class="code hl_enumvalue" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#gga707195ce0627016bf371643bdd9caa51a3dbd1016ea99d087d747530418b89a01">NC</a>, <a class="code hl_enumvalue" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#gga707195ce0627016bf371643bdd9caa51a3dbd1016ea99d087d747530418b89a01">NC</a> },</div>
<div class="line">        <span class="comment">// Memory slave select signal</span></div>
<div class="line">        .ssel = CYBSP_QSPI_SS_0</div>
<div class="line">    };</div>
<div class="line"> </div>
<div class="line">    <span class="comment">// Initialize QSPI peripheral with appropriate GPIOs</span></div>
<div class="line">    result = <a class="code hl_function" href="group__group__hal__qspi.html#ga2ef047225a5818541a93a5a1a2039a0b">cyhal_qspi_init</a>(&amp;qspi_object, CYBSP_QSPI_SCK, &amp;memory_pin_set, QSPI_BUS_FREQUENCY_HZ,</div>
<div class="line">                             0, NULL);</div>
<div class="line"> </div>
<div class="line">    <span class="comment">// HAL API for read operation</span></div>
<div class="line">    result = <a class="code hl_function" href="group__group__hal__qspi.html#gaa82f8a18f5936ff7323d72574165190a">cyhal_qspi_read</a>(&amp;qspi_object, &amp;device_specific_read_command, ADDRESS, rx_buf, &amp;length);</div>
<div class="ttc" id="agroup__group__hal__impl__hw__types_html_structcyhal__qspi__t"><div class="ttname"><a href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a></div><div class="ttdoc">QSPI object.</div><div class="ttdef"><b>Definition:</b> cyhal_hw_types.h:1032</div></div>
<div class="ttc" id="agroup__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble_html_gga707195ce0627016bf371643bdd9caa51a3dbd1016ea99d087d747530418b89a01"><div class="ttname"><a href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#gga707195ce0627016bf371643bdd9caa51a3dbd1016ea99d087d747530418b89a01">NC</a></div><div class="ttdeci">@ NC</div><div class="ttdoc">No Connect/Invalid Pin.</div><div class="ttdef"><b>Definition:</b> cyhal_psoc6_01_104_m_csp_ble.h:53</div></div>
<div class="ttc" id="agroup__group__hal__qspi_html_ab5692bbff73ecb9c1cf71aa23d203bc1"><div class="ttname"><a href="group__group__hal__qspi.html#ab5692bbff73ecb9c1cf71aa23d203bc1">cyhal_qspi_slave_pin_config_t::io</a></div><div class="ttdeci">cyhal_gpio_t io[8]</div><div class="ttdoc">IOx lines of connected memory.</div><div class="ttdef"><b>Definition:</b> cyhal_qspi.h:218</div></div>
<div class="ttc" id="agroup__group__hal__qspi_html_ga2ef047225a5818541a93a5a1a2039a0b"><div class="ttname"><a href="group__group__hal__qspi.html#ga2ef047225a5818541a93a5a1a2039a0b">cyhal_qspi_init</a></div><div class="ttdeci">cy_rslt_t cyhal_qspi_init(cyhal_qspi_t *obj, cyhal_gpio_t sclk, const cyhal_qspi_slave_pin_config_t *pin_set, uint32_t hz, uint8_t mode, cyhal_clock_t *clk)</div><div class="ttdoc">Initialize QSPI peripheral.</div></div>
<div class="ttc" id="agroup__group__hal__qspi_html_gaa82f8a18f5936ff7323d72574165190a"><div class="ttname"><a href="group__group__hal__qspi.html#gaa82f8a18f5936ff7323d72574165190a">cyhal_qspi_read</a></div><div class="ttdeci">cy_rslt_t cyhal_qspi_read(cyhal_qspi_t *obj, const cyhal_qspi_command_t *command, uint32_t address, void *data, size_t *length)</div><div class="ttdoc">Receive a command and block of data, synchronously.</div></div>
<div class="ttc" id="agroup__group__hal__qspi_html_structcyhal__qspi__slave__pin__config__t"><div class="ttname"><a href="group__group__hal__qspi.html#structcyhal__qspi__slave__pin__config__t">cyhal_qspi_slave_pin_config_t</a></div><div class="ttdoc">QSPI slave pin set.</div><div class="ttdef"><b>Definition:</b> cyhal_qspi.h:217</div></div>
<div class="ttc" id="agroup__group__result_html_gaca79700fcc701534ce61778a9bcf57d1"><div class="ttname"><a href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a></div><div class="ttdeci">uint32_t cy_rslt_t</div><div class="ttdoc">Provides the result of an operation as a structured bitfield.</div><div class="ttdef"><b>Definition:</b> cy_result.h:438</div></div>
</div><!-- fragment --> <h2><a class="anchor" id="subsection_qspi_snippet_3"></a>
Code Snippet 3: Erasing Flash memory</h2>
<p >The following code snippet demonstrates the use of <a class="el" href="group__group__hal__qspi.html#gad3d0ba591bae66de98b2eac59b915ed1" title="Send a command (and optionally data) and get the response.">cyhal_qspi_transfer()</a> API for sending single byte instruction that may or may not need any address or data bytes. It also shows the usage of status register read command within a while loop to poll the WIP bit status. </p><div class="fragment"><div class="line">    <a class="code hl_typedef" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a>    result;</div>
<div class="line">    <a class="code hl_struct" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> qspi_object;</div>
<div class="line">    uint8_t      rx_buf[PACKET_SIZE];</div>
<div class="line">    uint8_t      wip    = 0x01;</div>
<div class="line">    <span class="keywordtype">size_t</span>       length = 1;</div>
<div class="line"> </div>
<div class="line">    <span class="comment">// HAL API for TX-RX transaction used for sending WREN command</span></div>
<div class="line">    result = <a class="code hl_function" href="group__group__hal__qspi.html#gad3d0ba591bae66de98b2eac59b915ed1">cyhal_qspi_transfer</a>(&amp;qspi_object, &amp;device_specific_wren_command, ADDRESS, NULL, 0,</div>
<div class="line">                                 NULL, 0);</div>
<div class="line"> </div>
<div class="line">    <span class="comment">// HAL API for TX-RX transaction used for sending SE command</span></div>
<div class="line">    result = <a class="code hl_function" href="group__group__hal__qspi.html#gad3d0ba591bae66de98b2eac59b915ed1">cyhal_qspi_transfer</a>(&amp;qspi_object, &amp;device_specific_se_command, ADDRESS, NULL, 0,</div>
<div class="line">                                 NULL, 0);</div>
<div class="line"> </div>
<div class="line">    <span class="keywordflow">while</span> (wip)</div>
<div class="line">    {</div>
<div class="line">        <span class="comment">// Wait until the Erase operation is completed</span></div>
<div class="line">        <a class="code hl_function" href="group__group__hal__qspi.html#gaa82f8a18f5936ff7323d72574165190a">cyhal_qspi_read</a>(&amp;qspi_object, &amp;device_specific_rdsr1_command, ADDRESS, rx_buf, &amp;length);</div>
<div class="line">        wip = rx_buf[0] &amp; 0x01;</div>
<div class="line">    }</div>
<div class="ttc" id="agroup__group__hal__qspi_html_gad3d0ba591bae66de98b2eac59b915ed1"><div class="ttname"><a href="group__group__hal__qspi.html#gad3d0ba591bae66de98b2eac59b915ed1">cyhal_qspi_transfer</a></div><div class="ttdeci">cy_rslt_t cyhal_qspi_transfer(cyhal_qspi_t *obj, const cyhal_qspi_command_t *command, uint32_t address, const void *tx_data, size_t tx_size, void *rx_data, size_t rx_size)</div><div class="ttdoc">Send a command (and optionally data) and get the response.</div></div>
</div><!-- fragment --> <dl class="section note"><dt>Note</dt><dd>Flash memories need erase operation before programming. </dd></dl>
<h2><a class="anchor" id="subsection_qspi_snippet_4"></a>
Code Snippet 4: Programming Flash memory</h2>
<p >This code snippet demonstrates the usage <a class="el" href="group__group__hal__qspi.html#ga3f3229928c764a4376032b41a63c2f35" title="Send a command and block of data, synchronously.">cyhal_qspi_write()</a> API for executing program operation on flash memory. </p><div class="fragment"><div class="line">    <a class="code hl_typedef" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a>    result;</div>
<div class="line">    <a class="code hl_struct" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> qspi_object;</div>
<div class="line">    uint8_t      tx_buf[PACKET_SIZE];</div>
<div class="line">    uint8_t      rx_buf[PACKET_SIZE];</div>
<div class="line">    <span class="keywordtype">size_t</span>       length = PACKET_SIZE;</div>
<div class="line">    uint8_t      wip    = 0x01;</div>
<div class="line"> </div>
<div class="line">    <span class="comment">// Initialization of tx_buffer</span></div>
<div class="line">    <span class="keywordflow">for</span> (<span class="keywordtype">int</span> i = 0; i &lt; PACKET_SIZE; i++)</div>
<div class="line">    {</div>
<div class="line">        tx_buf[i] = i;</div>
<div class="line">    }</div>
<div class="line"> </div>
<div class="line">    <span class="comment">// HAL API for TX-RX transaction used for sending WREN command</span></div>
<div class="line">    result = <a class="code hl_function" href="group__group__hal__qspi.html#gad3d0ba591bae66de98b2eac59b915ed1">cyhal_qspi_transfer</a>(&amp;qspi_object, &amp;device_specific_wren_command, ADDRESS, NULL, 0,</div>
<div class="line">                                 NULL, 0);</div>
<div class="line"> </div>
<div class="line">    <span class="comment">// HAL API for write operation</span></div>
<div class="line">    result = <a class="code hl_function" href="group__group__hal__qspi.html#ga3f3229928c764a4376032b41a63c2f35">cyhal_qspi_write</a>(&amp;qspi_object, &amp;device_specific_pp_command, ADDRESS, tx_buf, &amp;length);</div>
<div class="line"> </div>
<div class="line">    <span class="keywordflow">while</span> (wip)</div>
<div class="line">    {</div>
<div class="line">        <span class="comment">// Wait until the Write operation is completed</span></div>
<div class="line">        <a class="code hl_function" href="group__group__hal__qspi.html#gaa82f8a18f5936ff7323d72574165190a">cyhal_qspi_read</a>(&amp;qspi_object, &amp;device_specific_rdsr1_command, ADDRESS, rx_buf, &amp;length);</div>
<div class="line">        wip = rx_buf[0] &amp; 0x01;</div>
<div class="line">    }</div>
<div class="ttc" id="agroup__group__hal__qspi_html_ga3f3229928c764a4376032b41a63c2f35"><div class="ttname"><a href="group__group__hal__qspi.html#ga3f3229928c764a4376032b41a63c2f35">cyhal_qspi_write</a></div><div class="ttdeci">cy_rslt_t cyhal_qspi_write(cyhal_qspi_t *obj, const cyhal_qspi_command_t *command, uint32_t address, const void *data, size_t *length)</div><div class="ttdoc">Send a command and block of data, synchronously.</div></div>
</div><!-- fragment --> <h2><a class="anchor" id="subsection_qspi_snippet_5"></a>
Code Snippet 5: Configuring multiple memories</h2>
<p >This code snippet demonstrates the usage <a class="el" href="group__group__hal__qspi.html#gad5c89472279e1db26d2038bae0bf2e82" title="Configure provided set of pins to service additional slave memory.">cyhal_qspi_slave_configure()</a> and <a class="el" href="group__group__hal__qspi.html#ga0a0ffa8e5c9c92289b4624616cc27803" title="Selects an active slave select (SSEL) line from one of available and previously configured.">cyhal_qspi_select_active_ssel()</a> API for for initialization environment for additional (additional to one, that was initialized in scope of <a class="el" href="group__group__hal__qspi.html#ga2ef047225a5818541a93a5a1a2039a0b" title="Initialize QSPI peripheral.">cyhal_qspi_init()</a>) QSPI memory and switching between memories. </p><div class="fragment"><div class="line">    <a class="code hl_typedef" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a>    result;</div>
<div class="line">    <a class="code hl_struct" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> qspi_object;</div>
<div class="line"> </div>
<div class="line">    <a class="code hl_struct" href="group__group__hal__qspi.html#structcyhal__qspi__slave__pin__config__t">cyhal_qspi_slave_pin_config_t</a> memory_0_pin_set =</div>
<div class="line">    {</div>
<div class="line">        <span class="comment">// Memory data lines (IO0, IO1)</span></div>
<div class="line">        .<a class="code hl_variable" href="group__group__hal__qspi.html#ab5692bbff73ecb9c1cf71aa23d203bc1">io</a>   = { CYBSP_QSPI_D0, CYBSP_QSPI_D1, <a class="code hl_enumvalue" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#gga707195ce0627016bf371643bdd9caa51a3dbd1016ea99d087d747530418b89a01">NC</a>, <a class="code hl_enumvalue" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#gga707195ce0627016bf371643bdd9caa51a3dbd1016ea99d087d747530418b89a01">NC</a>, <a class="code hl_enumvalue" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#gga707195ce0627016bf371643bdd9caa51a3dbd1016ea99d087d747530418b89a01">NC</a>, <a class="code hl_enumvalue" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#gga707195ce0627016bf371643bdd9caa51a3dbd1016ea99d087d747530418b89a01">NC</a>, <a class="code hl_enumvalue" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#gga707195ce0627016bf371643bdd9caa51a3dbd1016ea99d087d747530418b89a01">NC</a>, <a class="code hl_enumvalue" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#gga707195ce0627016bf371643bdd9caa51a3dbd1016ea99d087d747530418b89a01">NC</a> },</div>
<div class="line">        <span class="comment">// Memory slave select signal</span></div>
<div class="line">        .ssel = CYBSP_QSPI_SS_0</div>
<div class="line">    };</div>
<div class="line"> </div>
<div class="line">    <span class="comment">// Initialize QSPI peripheral with appropriate GPIOs</span></div>
<div class="line">    result = <a class="code hl_function" href="group__group__hal__qspi.html#ga2ef047225a5818541a93a5a1a2039a0b">cyhal_qspi_init</a>(&amp;qspi_object, CYBSP_QSPI_SCK, &amp;memory_0_pin_set, QSPI_BUS_FREQUENCY_HZ,</div>
<div class="line">                             0, NULL);</div>
<div class="line"> </div>
<div class="line">    <span class="comment">// Perform needed transfers with memory #0</span></div>
<div class="line"> </div>
<div class="line">    <a class="code hl_struct" href="group__group__hal__qspi.html#structcyhal__qspi__slave__pin__config__t">cyhal_qspi_slave_pin_config_t</a> memory_1_pin_set =</div>
<div class="line">    {</div>
<div class="line">        <span class="comment">// Memory data lines (IO2, IO3)</span></div>
<div class="line">        .<a class="code hl_variable" href="group__group__hal__qspi.html#ab5692bbff73ecb9c1cf71aa23d203bc1">io</a>   = { CYBSP_QSPI_D2, CYBSP_QSPI_D3, <a class="code hl_enumvalue" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#gga707195ce0627016bf371643bdd9caa51a3dbd1016ea99d087d747530418b89a01">NC</a>, <a class="code hl_enumvalue" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#gga707195ce0627016bf371643bdd9caa51a3dbd1016ea99d087d747530418b89a01">NC</a>, <a class="code hl_enumvalue" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#gga707195ce0627016bf371643bdd9caa51a3dbd1016ea99d087d747530418b89a01">NC</a>, <a class="code hl_enumvalue" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#gga707195ce0627016bf371643bdd9caa51a3dbd1016ea99d087d747530418b89a01">NC</a>, <a class="code hl_enumvalue" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#gga707195ce0627016bf371643bdd9caa51a3dbd1016ea99d087d747530418b89a01">NC</a>, <a class="code hl_enumvalue" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#gga707195ce0627016bf371643bdd9caa51a3dbd1016ea99d087d747530418b89a01">NC</a> },</div>
<div class="line">        <span class="comment">// Memory slave select signal</span></div>
<div class="line">        .ssel = CYBSP_QSPI_SS_1</div>
<div class="line">    };</div>
<div class="line"> </div>
<div class="line">    <span class="comment">// Configure pins for memory #1</span></div>
<div class="line">    result = <a class="code hl_function" href="group__group__hal__qspi.html#gad5c89472279e1db26d2038bae0bf2e82">cyhal_qspi_slave_configure</a>(&amp;qspi_object, &amp;memory_1_pin_set);</div>
<div class="line">    <span class="comment">// Make memory #1 slave select active</span></div>
<div class="line">    result = <a class="code hl_function" href="group__group__hal__qspi.html#ga0a0ffa8e5c9c92289b4624616cc27803">cyhal_qspi_select_active_ssel</a>(&amp;qspi_object, memory_1_pin_set.<a class="code hl_variable" href="group__group__hal__qspi.html#ad983d763a009536ffbd385d25b2cea11">ssel</a>);</div>
<div class="line"> </div>
<div class="line">    <span class="comment">// Perform needed transfers with memory #1</span></div>
<div class="line"> </div>
<div class="line">    <span class="comment">// Make memory #0 slave select active again</span></div>
<div class="line">    result = <a class="code hl_function" href="group__group__hal__qspi.html#ga0a0ffa8e5c9c92289b4624616cc27803">cyhal_qspi_select_active_ssel</a>(&amp;qspi_object, memory_0_pin_set.<a class="code hl_variable" href="group__group__hal__qspi.html#ad983d763a009536ffbd385d25b2cea11">ssel</a>);</div>
<div class="ttc" id="agroup__group__hal__qspi_html_ad983d763a009536ffbd385d25b2cea11"><div class="ttname"><a href="group__group__hal__qspi.html#ad983d763a009536ffbd385d25b2cea11">cyhal_qspi_slave_pin_config_t::ssel</a></div><div class="ttdeci">cyhal_gpio_t ssel</div><div class="ttdoc">Slave Select line of connected memory.</div><div class="ttdef"><b>Definition:</b> cyhal_qspi.h:219</div></div>
<div class="ttc" id="agroup__group__hal__qspi_html_ga0a0ffa8e5c9c92289b4624616cc27803"><div class="ttname"><a href="group__group__hal__qspi.html#ga0a0ffa8e5c9c92289b4624616cc27803">cyhal_qspi_select_active_ssel</a></div><div class="ttdeci">cy_rslt_t cyhal_qspi_select_active_ssel(cyhal_qspi_t *obj, cyhal_gpio_t ssel)</div><div class="ttdoc">Selects an active slave select (SSEL) line from one of available and previously configured.</div></div>
<div class="ttc" id="agroup__group__hal__qspi_html_gad5c89472279e1db26d2038bae0bf2e82"><div class="ttname"><a href="group__group__hal__qspi.html#gad5c89472279e1db26d2038bae0bf2e82">cyhal_qspi_slave_configure</a></div><div class="ttdeci">cy_rslt_t cyhal_qspi_slave_configure(cyhal_qspi_t *obj, const cyhal_qspi_slave_pin_config_t *pin_set)</div><div class="ttdoc">Configure provided set of pins to service additional slave memory.</div></div>
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<tr class="memitem:group__group__hal__results__qspi"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__results__qspi.html">QSPI HAL Results</a></td></tr>
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Typedefs</h2></td></tr>
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typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_qspi_event_callback_t</b>) (void *callback_arg, <a class="el" href="group__group__hal__qspi.html#gadae12b69a94f743b345655ec751d8aad">cyhal_qspi_event_t</a> event)</td></tr>
<tr class="memdesc:ga42887dff6257345711b353990edb1ab1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Handler for QSPI callbacks. <br /></td></tr>
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Enumerations</h2></td></tr>
<tr class="memitem:gaddc93a79f0708fd53897d0c37bc7544b"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__qspi.html#gaddc93a79f0708fd53897d0c37bc7544b">cyhal_qspi_bus_width_t</a> { <br />
&#160;&#160;<a class="el" href="group__group__hal__qspi.html#ggaddc93a79f0708fd53897d0c37bc7544bab14f0354fdb42ea40c30274df3eeb74f">CYHAL_QSPI_CFG_BUS_SINGLE</a> = 1
, <br />
&#160;&#160;<a class="el" href="group__group__hal__qspi.html#ggaddc93a79f0708fd53897d0c37bc7544baca253e83014241113acff2120db94c4a">CYHAL_QSPI_CFG_BUS_DUAL</a> = 2
, <br />
&#160;&#160;<a class="el" href="group__group__hal__qspi.html#ggaddc93a79f0708fd53897d0c37bc7544ba9e084c6cdea0e030633d139720cad303">CYHAL_QSPI_CFG_BUS_QUAD</a> = 4
, <br />
&#160;&#160;<a class="el" href="group__group__hal__qspi.html#ggaddc93a79f0708fd53897d0c37bc7544ba29b9bcb8d38a946e6b629d0950cce40d">CYHAL_QSPI_CFG_BUS_OCTAL</a> = 8
<br />
 }</td></tr>
<tr class="memdesc:gaddc93a79f0708fd53897d0c37bc7544b"><td class="mdescLeft">&#160;</td><td class="mdescRight">QSPI Bus width.  <a href="group__group__hal__qspi.html#gaddc93a79f0708fd53897d0c37bc7544b">More...</a><br /></td></tr>
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<tr class="memitem:ga0633be58b4427d173d1f94c4e6e4e058"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__qspi.html#ga0633be58b4427d173d1f94c4e6e4e058">cyhal_qspi_size_t</a> { <br />
&#160;&#160;<a class="el" href="group__group__hal__qspi.html#gga0633be58b4427d173d1f94c4e6e4e058a3a800b560a9a1ff08d80174908a5b577">CYHAL_QSPI_CFG_SIZE_8</a> = 8
, <br />
&#160;&#160;<a class="el" href="group__group__hal__qspi.html#gga0633be58b4427d173d1f94c4e6e4e058ababf1c204fafe33c239c4304ecb7dd0b">CYHAL_QSPI_CFG_SIZE_16</a> = 16
, <br />
&#160;&#160;<a class="el" href="group__group__hal__qspi.html#gga0633be58b4427d173d1f94c4e6e4e058a3255bb7d1a9fbf71e28c121df749135e">CYHAL_QSPI_CFG_SIZE_24</a> = 24
, <br />
&#160;&#160;<a class="el" href="group__group__hal__qspi.html#gga0633be58b4427d173d1f94c4e6e4e058a065035b5f8a48d6edfb798e8e3390eed">CYHAL_QSPI_CFG_SIZE_32</a> = 32
<br />
 }</td></tr>
<tr class="memdesc:ga0633be58b4427d173d1f94c4e6e4e058"><td class="mdescLeft">&#160;</td><td class="mdescRight">Address size in bits.  <a href="group__group__hal__qspi.html#ga0633be58b4427d173d1f94c4e6e4e058">More...</a><br /></td></tr>
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<tr class="memitem:gadae12b69a94f743b345655ec751d8aad"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__qspi.html#gadae12b69a94f743b345655ec751d8aad">cyhal_qspi_event_t</a> { <br />
&#160;&#160;<a class="el" href="group__group__hal__qspi.html#ggadae12b69a94f743b345655ec751d8aadac4bda5668bc258f4508d4a1d5cdec9df">CYHAL_QSPI_EVENT_NONE</a> = 0
, <br />
&#160;&#160;<a class="el" href="group__group__hal__qspi.html#ggadae12b69a94f743b345655ec751d8aadab1b4499185f082601c68a36c6be0d034">CYHAL_QSPI_IRQ_TRANSMIT_DONE</a> = 1 &lt;&lt; 0
, <br />
&#160;&#160;<a class="el" href="group__group__hal__qspi.html#ggadae12b69a94f743b345655ec751d8aada3c0c0f4d57cf0d2a00ab20ec587fe409">CYHAL_QSPI_IRQ_RECEIVE_DONE</a> = 1 &lt;&lt; 1
<br />
 }</td></tr>
<tr class="memdesc:gadae12b69a94f743b345655ec751d8aad"><td class="mdescLeft">&#160;</td><td class="mdescRight">QSPI interrupt triggers.  <a href="group__group__hal__qspi.html#gadae12b69a94f743b345655ec751d8aad">More...</a><br /></td></tr>
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<tr class="memitem:gac30267a66618a021ee34be687fa1442c"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__qspi.html#gac30267a66618a021ee34be687fa1442c">cyhal_qspi_datarate_t</a> { <br />
&#160;&#160;<a class="el" href="group__group__hal__qspi.html#ggac30267a66618a021ee34be687fa1442cac5b17b7596a02b09061b622a7a379cdc">CYHAL_QSPI_DATARATE_SDR</a> = 0
, <br />
&#160;&#160;<a class="el" href="group__group__hal__qspi.html#ggac30267a66618a021ee34be687fa1442caf4476393b48f5854485d555186b6ee52">CYHAL_QSPI_DATARATE_DDR</a> = 1
<br />
 }</td></tr>
<tr class="memdesc:gac30267a66618a021ee34be687fa1442c"><td class="mdescLeft">&#160;</td><td class="mdescRight">QSPI data rate.  <a href="group__group__hal__qspi.html#gac30267a66618a021ee34be687fa1442c">More...</a><br /></td></tr>
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</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga2ef047225a5818541a93a5a1a2039a0b"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__qspi.html#ga2ef047225a5818541a93a5a1a2039a0b">cyhal_qspi_init</a> (<a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *obj, <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#ga707195ce0627016bf371643bdd9caa51">cyhal_gpio_t</a> sclk, const <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__slave__pin__config__t">cyhal_qspi_slave_pin_config_t</a> *pin_set, uint32_t hz, uint8_t mode, <a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__clock__t">cyhal_clock_t</a> *clk)</td></tr>
<tr class="memdesc:ga2ef047225a5818541a93a5a1a2039a0b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize QSPI peripheral.  <a href="group__group__hal__qspi.html#ga2ef047225a5818541a93a5a1a2039a0b">More...</a><br /></td></tr>
<tr class="separator:ga2ef047225a5818541a93a5a1a2039a0b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga885169c7f722ebc20317441f9f91bc90"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__qspi.html#ga885169c7f722ebc20317441f9f91bc90">cyhal_qspi_init_cfg</a> (<a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *obj, const <a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__configurator__t">cyhal_qspi_configurator_t</a> *cfg)</td></tr>
<tr class="memdesc:ga885169c7f722ebc20317441f9f91bc90"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize the QSPI peripheral using a configurator generated configuration struct.  <a href="group__group__hal__qspi.html#ga885169c7f722ebc20317441f9f91bc90">More...</a><br /></td></tr>
<tr class="separator:ga885169c7f722ebc20317441f9f91bc90"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga14906073e688d345f01f880f9400bba3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__qspi.html#ga14906073e688d345f01f880f9400bba3">cyhal_qspi_free</a> (<a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *obj)</td></tr>
<tr class="memdesc:ga14906073e688d345f01f880f9400bba3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Deinitilize QSPI peripheral.  <a href="group__group__hal__qspi.html#ga14906073e688d345f01f880f9400bba3">More...</a><br /></td></tr>
<tr class="separator:ga14906073e688d345f01f880f9400bba3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga67150e1497b4547854d48b23deb8fd47"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__qspi.html#ga67150e1497b4547854d48b23deb8fd47">cyhal_qspi_set_frequency</a> (<a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *obj, uint32_t hz)</td></tr>
<tr class="memdesc:ga67150e1497b4547854d48b23deb8fd47"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the QSPI baud rate.  <a href="group__group__hal__qspi.html#ga67150e1497b4547854d48b23deb8fd47">More...</a><br /></td></tr>
<tr class="separator:ga67150e1497b4547854d48b23deb8fd47"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7d779256e9226180b2f6aa8f6af0bcab"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__qspi.html#ga7d779256e9226180b2f6aa8f6af0bcab">cyhal_qspi_get_frequency</a> (<a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *obj)</td></tr>
<tr class="memdesc:ga7d779256e9226180b2f6aa8f6af0bcab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the actual frequency that QSPI is configured for.  <a href="group__group__hal__qspi.html#ga7d779256e9226180b2f6aa8f6af0bcab">More...</a><br /></td></tr>
<tr class="separator:ga7d779256e9226180b2f6aa8f6af0bcab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad5c89472279e1db26d2038bae0bf2e82"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__qspi.html#gad5c89472279e1db26d2038bae0bf2e82">cyhal_qspi_slave_configure</a> (<a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *obj, const <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__slave__pin__config__t">cyhal_qspi_slave_pin_config_t</a> *pin_set)</td></tr>
<tr class="memdesc:gad5c89472279e1db26d2038bae0bf2e82"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure provided set of pins to service additional slave memory.  <a href="group__group__hal__qspi.html#gad5c89472279e1db26d2038bae0bf2e82">More...</a><br /></td></tr>
<tr class="separator:gad5c89472279e1db26d2038bae0bf2e82"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0a0ffa8e5c9c92289b4624616cc27803"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__qspi.html#ga0a0ffa8e5c9c92289b4624616cc27803">cyhal_qspi_select_active_ssel</a> (<a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *obj, <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#ga707195ce0627016bf371643bdd9caa51">cyhal_gpio_t</a> ssel)</td></tr>
<tr class="memdesc:ga0a0ffa8e5c9c92289b4624616cc27803"><td class="mdescLeft">&#160;</td><td class="mdescRight">Selects an active slave select (SSEL) line from one of available and previously configured.  <a href="group__group__hal__qspi.html#ga0a0ffa8e5c9c92289b4624616cc27803">More...</a><br /></td></tr>
<tr class="separator:ga0a0ffa8e5c9c92289b4624616cc27803"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa82f8a18f5936ff7323d72574165190a"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__qspi.html#gaa82f8a18f5936ff7323d72574165190a">cyhal_qspi_read</a> (<a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *obj, const <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__command__t">cyhal_qspi_command_t</a> *command, uint32_t address, void *data, size_t *length)</td></tr>
<tr class="memdesc:gaa82f8a18f5936ff7323d72574165190a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Receive a command and block of data, synchronously.  <a href="group__group__hal__qspi.html#gaa82f8a18f5936ff7323d72574165190a">More...</a><br /></td></tr>
<tr class="separator:gaa82f8a18f5936ff7323d72574165190a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga734bbcfd805a4e0f0327a8a903c43c90"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__qspi.html#ga734bbcfd805a4e0f0327a8a903c43c90">cyhal_qspi_read_async</a> (<a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *obj, const <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__command__t">cyhal_qspi_command_t</a> *command, uint32_t address, void *data, size_t *length)</td></tr>
<tr class="memdesc:ga734bbcfd805a4e0f0327a8a903c43c90"><td class="mdescLeft">&#160;</td><td class="mdescRight">Receive a command and block of data in asynchronous mode.  <a href="group__group__hal__qspi.html#ga734bbcfd805a4e0f0327a8a903c43c90">More...</a><br /></td></tr>
<tr class="separator:ga734bbcfd805a4e0f0327a8a903c43c90"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3f3229928c764a4376032b41a63c2f35"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__qspi.html#ga3f3229928c764a4376032b41a63c2f35">cyhal_qspi_write</a> (<a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *obj, const <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__command__t">cyhal_qspi_command_t</a> *command, uint32_t address, const void *data, size_t *length)</td></tr>
<tr class="memdesc:ga3f3229928c764a4376032b41a63c2f35"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send a command and block of data, synchronously.  <a href="group__group__hal__qspi.html#ga3f3229928c764a4376032b41a63c2f35">More...</a><br /></td></tr>
<tr class="separator:ga3f3229928c764a4376032b41a63c2f35"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9521128b942f52fe2146cac081d48d02"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__qspi.html#ga9521128b942f52fe2146cac081d48d02">cyhal_qspi_write_async</a> (<a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *obj, const <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__command__t">cyhal_qspi_command_t</a> *command, uint32_t address, const void *data, size_t *length)</td></tr>
<tr class="memdesc:ga9521128b942f52fe2146cac081d48d02"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send a command and block of data in asynchronous mode.  <a href="group__group__hal__qspi.html#ga9521128b942f52fe2146cac081d48d02">More...</a><br /></td></tr>
<tr class="separator:ga9521128b942f52fe2146cac081d48d02"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad3d0ba591bae66de98b2eac59b915ed1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__qspi.html#gad3d0ba591bae66de98b2eac59b915ed1">cyhal_qspi_transfer</a> (<a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *obj, const <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__command__t">cyhal_qspi_command_t</a> *command, uint32_t address, const void *tx_data, size_t tx_size, void *rx_data, size_t rx_size)</td></tr>
<tr class="memdesc:gad3d0ba591bae66de98b2eac59b915ed1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send a command (and optionally data) and get the response.  <a href="group__group__hal__qspi.html#gad3d0ba591bae66de98b2eac59b915ed1">More...</a><br /></td></tr>
<tr class="separator:gad3d0ba591bae66de98b2eac59b915ed1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3650436f640ed3e7640dafaa90268700"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__qspi.html#ga3650436f640ed3e7640dafaa90268700">cyhal_qspi_register_callback</a> (<a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *obj, <a class="el" href="group__group__hal__qspi.html#ga42887dff6257345711b353990edb1ab1">cyhal_qspi_event_callback_t</a> callback, void *callback_arg)</td></tr>
<tr class="memdesc:ga3650436f640ed3e7640dafaa90268700"><td class="mdescLeft">&#160;</td><td class="mdescRight">Register a QSPI event handler.  <a href="group__group__hal__qspi.html#ga3650436f640ed3e7640dafaa90268700">More...</a><br /></td></tr>
<tr class="separator:ga3650436f640ed3e7640dafaa90268700"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga133e886b33443ee76ad7239623290079"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__qspi.html#ga133e886b33443ee76ad7239623290079">cyhal_qspi_enable_event</a> (<a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *obj, <a class="el" href="group__group__hal__qspi.html#gadae12b69a94f743b345655ec751d8aad">cyhal_qspi_event_t</a> event, uint8_t intr_priority, bool enable)</td></tr>
<tr class="memdesc:ga133e886b33443ee76ad7239623290079"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure QSPI interrupt enablement.  <a href="group__group__hal__qspi.html#ga133e886b33443ee76ad7239623290079">More...</a><br /></td></tr>
<tr class="separator:ga133e886b33443ee76ad7239623290079"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<hr/><h2 class="groupheader">Data Structure Documentation</h2>
<a name="structcyhal__qspi__command__t" id="structcyhal__qspi__command__t"></a>
<h2 class="memtitle"><span class="permalink"><a href="#structcyhal__qspi__command__t">&#9670;&nbsp;</a></span>cyhal_qspi_command_t</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">struct cyhal_qspi_command_t</td>
        </tr>
      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="3">Data Fields</th></tr>
<tr><td class="fieldtype">
<a id="adf9dd732169ddf6d4e965358c0307bcb" name="adf9dd732169ddf6d4e965358c0307bcb"></a>struct <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__command__t_8instruction">cyhal_qspi_command_t.instruction</a></td>
<td class="fieldname">
instruction</td>
<td class="fielddoc">
Instruction structure. </td></tr>
<tr><td class="fieldtype">
<a id="a08499159dac57929b43f63d15add1341" name="a08499159dac57929b43f63d15add1341"></a>struct <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__command__t_8address">cyhal_qspi_command_t.address</a></td>
<td class="fieldname">
address</td>
<td class="fielddoc">
Address structure. </td></tr>
<tr><td class="fieldtype">
<a id="abd8ab651ee766c3c6d3dafe722a75110" name="abd8ab651ee766c3c6d3dafe722a75110"></a>struct <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__command__t_8mode__bits">cyhal_qspi_command_t.mode_bits</a></td>
<td class="fieldname">
mode_bits</td>
<td class="fielddoc">
Mode bits structure. </td></tr>
<tr><td class="fieldtype">
<a id="a3ffb628d6e18c8ffc60667d46af23325" name="a3ffb628d6e18c8ffc60667d46af23325"></a>struct <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__command__t_8dummy__cycles">cyhal_qspi_command_t.dummy_cycles</a></td>
<td class="fieldname">
dummy_cycles</td>
<td class="fielddoc">
Dummy cycles structure. </td></tr>
<tr><td class="fieldtype">
<a id="a650ff21434ebed2c9ae6861252c2873a" name="a650ff21434ebed2c9ae6861252c2873a"></a>struct <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__command__t_8data">cyhal_qspi_command_t.data</a></td>
<td class="fieldname">
data</td>
<td class="fielddoc">
Data structure. </td></tr>
</table>

</div>
</div>
<a name="structcyhal__qspi__slave__pin__config__t" id="structcyhal__qspi__slave__pin__config__t"></a>
<h2 class="memtitle"><span class="permalink"><a href="#structcyhal__qspi__slave__pin__config__t">&#9670;&nbsp;</a></span>cyhal_qspi_slave_pin_config_t</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">struct cyhal_qspi_slave_pin_config_t</td>
        </tr>
      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="3">Data Fields</th></tr>
<tr><td class="fieldtype">
<a id="ab5692bbff73ecb9c1cf71aa23d203bc1" name="ab5692bbff73ecb9c1cf71aa23d203bc1"></a><a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#ga707195ce0627016bf371643bdd9caa51">cyhal_gpio_t</a></td>
<td class="fieldname">
io[8]</td>
<td class="fielddoc">
IOx lines of connected memory. </td></tr>
<tr><td class="fieldtype">
<a id="ad983d763a009536ffbd385d25b2cea11" name="ad983d763a009536ffbd385d25b2cea11"></a><a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#ga707195ce0627016bf371643bdd9caa51">cyhal_gpio_t</a></td>
<td class="fieldname">
ssel</td>
<td class="fielddoc">
Slave Select line of connected memory. </td></tr>
</table>

</div>
</div>
<a name="structcyhal__qspi__command__t_8instruction" id="structcyhal__qspi__command__t_8instruction"></a>
<h2 class="memtitle"><span class="permalink"><a href="#structcyhal__qspi__command__t_8instruction">&#9670;&nbsp;</a></span>cyhal_qspi_command_t.instruction</h2>

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        <tr>
          <td class="memname">struct cyhal_qspi_command_t.instruction</td>
        </tr>
      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="3">Data Fields</th></tr>
<tr><td class="fieldtype">
<a id="aaea78d2eed5d55bf6a19b3a4933520d2" name="aaea78d2eed5d55bf6a19b3a4933520d2"></a><a class="el" href="group__group__hal__qspi.html#gaddc93a79f0708fd53897d0c37bc7544b">cyhal_qspi_bus_width_t</a></td>
<td class="fieldname">
bus_width</td>
<td class="fielddoc">
Bus width for the instruction. </td></tr>
<tr><td class="fieldtype">
<a id="ae1ed362731f051e94dc58a95e0888c4d" name="ae1ed362731f051e94dc58a95e0888c4d"></a><a class="el" href="group__group__hal__qspi.html#gac30267a66618a021ee34be687fa1442c">cyhal_qspi_datarate_t</a></td>
<td class="fieldname">
data_rate</td>
<td class="fielddoc">
Data rate SDR/DDR. </td></tr>
<tr><td class="fieldtype">
<a id="a0f3156ffa57baf630ca4ad44812916cd" name="a0f3156ffa57baf630ca4ad44812916cd"></a>bool</td>
<td class="fieldname">
two_byte_cmd</td>
<td class="fielddoc">
Defines whether cmd is 2-byte value, or 1-byte (if false) </td></tr>
<tr><td class="fieldtype">
<a id="a2063c1608d6e0baf80249c42e2be5804" name="a2063c1608d6e0baf80249c42e2be5804"></a>uint16_t</td>
<td class="fieldname">
value</td>
<td class="fielddoc">
Instruction value. </td></tr>
<tr><td class="fieldtype">
<a id="a075ae3d2fc31640504f814f60e5ef713" name="a075ae3d2fc31640504f814f60e5ef713"></a>bool</td>
<td class="fieldname">
disabled</td>
<td class="fielddoc">
Instruction phase skipped if disabled is set to true. </td></tr>
</table>

</div>
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<a name="structcyhal__qspi__command__t_8address" id="structcyhal__qspi__command__t_8address"></a>
<h2 class="memtitle"><span class="permalink"><a href="#structcyhal__qspi__command__t_8address">&#9670;&nbsp;</a></span>cyhal_qspi_command_t.address</h2>

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<table class="fieldtable">
<tr><th colspan="3">Data Fields</th></tr>
<tr><td class="fieldtype">
<a id="aaea78d2eed5d55bf6a19b3a4933520d2" name="aaea78d2eed5d55bf6a19b3a4933520d2"></a><a class="el" href="group__group__hal__qspi.html#gaddc93a79f0708fd53897d0c37bc7544b">cyhal_qspi_bus_width_t</a></td>
<td class="fieldname">
bus_width</td>
<td class="fielddoc">
Bus width for the address. </td></tr>
<tr><td class="fieldtype">
<a id="ae1ed362731f051e94dc58a95e0888c4d" name="ae1ed362731f051e94dc58a95e0888c4d"></a><a class="el" href="group__group__hal__qspi.html#gac30267a66618a021ee34be687fa1442c">cyhal_qspi_datarate_t</a></td>
<td class="fieldname">
data_rate</td>
<td class="fielddoc">
Data rate SDR/DDR. </td></tr>
<tr><td class="fieldtype">
<a id="af7bd60b75b29d79b660a2859395c1a24" name="af7bd60b75b29d79b660a2859395c1a24"></a><a class="el" href="group__group__hal__qspi.html#ga0633be58b4427d173d1f94c4e6e4e058">cyhal_qspi_size_t</a></td>
<td class="fieldname">
size</td>
<td class="fielddoc">
Address size. </td></tr>
<tr><td class="fieldtype">
<a id="a075ae3d2fc31640504f814f60e5ef713" name="a075ae3d2fc31640504f814f60e5ef713"></a>bool</td>
<td class="fieldname">
disabled</td>
<td class="fielddoc">
Address phase skipped if disabled is set to true. </td></tr>
</table>

</div>
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<a name="structcyhal__qspi__command__t_8mode__bits" id="structcyhal__qspi__command__t_8mode__bits"></a>
<h2 class="memtitle"><span class="permalink"><a href="#structcyhal__qspi__command__t_8mode__bits">&#9670;&nbsp;</a></span>cyhal_qspi_command_t.mode_bits</h2>

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<table class="fieldtable">
<tr><th colspan="3">Data Fields</th></tr>
<tr><td class="fieldtype">
<a id="aaea78d2eed5d55bf6a19b3a4933520d2" name="aaea78d2eed5d55bf6a19b3a4933520d2"></a><a class="el" href="group__group__hal__qspi.html#gaddc93a79f0708fd53897d0c37bc7544b">cyhal_qspi_bus_width_t</a></td>
<td class="fieldname">
bus_width</td>
<td class="fielddoc">
Bus width for mode bits <br  />
 </td></tr>
<tr><td class="fieldtype">
<a id="ae1ed362731f051e94dc58a95e0888c4d" name="ae1ed362731f051e94dc58a95e0888c4d"></a><a class="el" href="group__group__hal__qspi.html#gac30267a66618a021ee34be687fa1442c">cyhal_qspi_datarate_t</a></td>
<td class="fieldname">
data_rate</td>
<td class="fielddoc">
Data rate SDR/DDR. </td></tr>
<tr><td class="fieldtype">
<a id="af7bd60b75b29d79b660a2859395c1a24" name="af7bd60b75b29d79b660a2859395c1a24"></a><a class="el" href="group__group__hal__qspi.html#ga0633be58b4427d173d1f94c4e6e4e058">cyhal_qspi_size_t</a></td>
<td class="fieldname">
size</td>
<td class="fielddoc">
Mode bits size. </td></tr>
<tr><td class="fieldtype">
<a id="a2063c1608d6e0baf80249c42e2be5804" name="a2063c1608d6e0baf80249c42e2be5804"></a>uint32_t</td>
<td class="fieldname">
value</td>
<td class="fielddoc">
Mode bits value. </td></tr>
<tr><td class="fieldtype">
<a id="a075ae3d2fc31640504f814f60e5ef713" name="a075ae3d2fc31640504f814f60e5ef713"></a>bool</td>
<td class="fieldname">
disabled</td>
<td class="fielddoc">
Mode bits phase skipped if disabled is set to true. </td></tr>
</table>

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<a name="structcyhal__qspi__command__t_8dummy__cycles" id="structcyhal__qspi__command__t_8dummy__cycles"></a>
<h2 class="memtitle"><span class="permalink"><a href="#structcyhal__qspi__command__t_8dummy__cycles">&#9670;&nbsp;</a></span>cyhal_qspi_command_t.dummy_cycles</h2>

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<table class="fieldtable">
<tr><th colspan="3">Data Fields</th></tr>
<tr><td class="fieldtype">
<a id="aaea78d2eed5d55bf6a19b3a4933520d2" name="aaea78d2eed5d55bf6a19b3a4933520d2"></a><a class="el" href="group__group__hal__qspi.html#gaddc93a79f0708fd53897d0c37bc7544b">cyhal_qspi_bus_width_t</a></td>
<td class="fieldname">
bus_width</td>
<td class="fielddoc">
Bus width for mode bits <br  />
 </td></tr>
<tr><td class="fieldtype">
<a id="ae1ed362731f051e94dc58a95e0888c4d" name="ae1ed362731f051e94dc58a95e0888c4d"></a><a class="el" href="group__group__hal__qspi.html#gac30267a66618a021ee34be687fa1442c">cyhal_qspi_datarate_t</a></td>
<td class="fieldname">
data_rate</td>
<td class="fielddoc">
Data rate SDR/DDR. </td></tr>
<tr><td class="fieldtype">
<a id="a7433af97c263a51d7ef9b63332cbb216" name="a7433af97c263a51d7ef9b63332cbb216"></a>uint32_t</td>
<td class="fieldname">
dummy_count</td>
<td class="fielddoc">
Dummy cycles count. </td></tr>
</table>

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<a name="structcyhal__qspi__command__t_8data" id="structcyhal__qspi__command__t_8data"></a>
<h2 class="memtitle"><span class="permalink"><a href="#structcyhal__qspi__command__t_8data">&#9670;&nbsp;</a></span>cyhal_qspi_command_t.data</h2>

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<table class="fieldtable">
<tr><th colspan="3">Data Fields</th></tr>
<tr><td class="fieldtype">
<a id="aaea78d2eed5d55bf6a19b3a4933520d2" name="aaea78d2eed5d55bf6a19b3a4933520d2"></a><a class="el" href="group__group__hal__qspi.html#gaddc93a79f0708fd53897d0c37bc7544b">cyhal_qspi_bus_width_t</a></td>
<td class="fieldname">
bus_width</td>
<td class="fielddoc">
Bus width for data. </td></tr>
<tr><td class="fieldtype">
<a id="ae1ed362731f051e94dc58a95e0888c4d" name="ae1ed362731f051e94dc58a95e0888c4d"></a><a class="el" href="group__group__hal__qspi.html#gac30267a66618a021ee34be687fa1442c">cyhal_qspi_datarate_t</a></td>
<td class="fieldname">
data_rate</td>
<td class="fielddoc">
Data rate SDR/DDR. </td></tr>
</table>

</div>
</div>
<h2 class="groupheader">Enumeration Type Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#gaddc93a79f0708fd53897d0c37bc7544b">&#9670;&nbsp;</a></span>cyhal_qspi_bus_width_t</h2>

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<p>QSPI Bus width. </p>
<p >Some parts of commands provide variable bus width. </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="ggaddc93a79f0708fd53897d0c37bc7544bab14f0354fdb42ea40c30274df3eeb74f" name="ggaddc93a79f0708fd53897d0c37bc7544bab14f0354fdb42ea40c30274df3eeb74f"></a>CYHAL_QSPI_CFG_BUS_SINGLE&#160;</td><td class="fielddoc"><p >Normal SPI Mode. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggaddc93a79f0708fd53897d0c37bc7544baca253e83014241113acff2120db94c4a" name="ggaddc93a79f0708fd53897d0c37bc7544baca253e83014241113acff2120db94c4a"></a>CYHAL_QSPI_CFG_BUS_DUAL&#160;</td><td class="fielddoc"><p >Dual SPI Mode. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggaddc93a79f0708fd53897d0c37bc7544ba9e084c6cdea0e030633d139720cad303" name="ggaddc93a79f0708fd53897d0c37bc7544ba9e084c6cdea0e030633d139720cad303"></a>CYHAL_QSPI_CFG_BUS_QUAD&#160;</td><td class="fielddoc"><p >Quad SPI Mode. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggaddc93a79f0708fd53897d0c37bc7544ba29b9bcb8d38a946e6b629d0950cce40d" name="ggaddc93a79f0708fd53897d0c37bc7544ba29b9bcb8d38a946e6b629d0950cce40d"></a>CYHAL_QSPI_CFG_BUS_OCTAL&#160;</td><td class="fielddoc"><p >Octal SPI Mode. </p>
</td></tr>
</table>

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<h2 class="memtitle"><span class="permalink"><a href="#ga0633be58b4427d173d1f94c4e6e4e058">&#9670;&nbsp;</a></span>cyhal_qspi_size_t</h2>

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<p>Address size in bits. </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="gga0633be58b4427d173d1f94c4e6e4e058a3a800b560a9a1ff08d80174908a5b577" name="gga0633be58b4427d173d1f94c4e6e4e058a3a800b560a9a1ff08d80174908a5b577"></a>CYHAL_QSPI_CFG_SIZE_8&#160;</td><td class="fielddoc"><p >8 bits address </p>
</td></tr>
<tr><td class="fieldname"><a id="gga0633be58b4427d173d1f94c4e6e4e058ababf1c204fafe33c239c4304ecb7dd0b" name="gga0633be58b4427d173d1f94c4e6e4e058ababf1c204fafe33c239c4304ecb7dd0b"></a>CYHAL_QSPI_CFG_SIZE_16&#160;</td><td class="fielddoc"><p >16 bits address </p>
</td></tr>
<tr><td class="fieldname"><a id="gga0633be58b4427d173d1f94c4e6e4e058a3255bb7d1a9fbf71e28c121df749135e" name="gga0633be58b4427d173d1f94c4e6e4e058a3255bb7d1a9fbf71e28c121df749135e"></a>CYHAL_QSPI_CFG_SIZE_24&#160;</td><td class="fielddoc"><p >24 bits address </p>
</td></tr>
<tr><td class="fieldname"><a id="gga0633be58b4427d173d1f94c4e6e4e058a065035b5f8a48d6edfb798e8e3390eed" name="gga0633be58b4427d173d1f94c4e6e4e058a065035b5f8a48d6edfb798e8e3390eed"></a>CYHAL_QSPI_CFG_SIZE_32&#160;</td><td class="fielddoc"><p >32 bits address </p>
</td></tr>
</table>

</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#gadae12b69a94f743b345655ec751d8aad">&#9670;&nbsp;</a></span>cyhal_qspi_event_t</h2>

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<p>QSPI interrupt triggers. </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="ggadae12b69a94f743b345655ec751d8aadac4bda5668bc258f4508d4a1d5cdec9df" name="ggadae12b69a94f743b345655ec751d8aadac4bda5668bc258f4508d4a1d5cdec9df"></a>CYHAL_QSPI_EVENT_NONE&#160;</td><td class="fielddoc"><p >No event. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggadae12b69a94f743b345655ec751d8aadab1b4499185f082601c68a36c6be0d034" name="ggadae12b69a94f743b345655ec751d8aadab1b4499185f082601c68a36c6be0d034"></a>CYHAL_QSPI_IRQ_TRANSMIT_DONE&#160;</td><td class="fielddoc"><p >Async transmit done. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggadae12b69a94f743b345655ec751d8aada3c0c0f4d57cf0d2a00ab20ec587fe409" name="ggadae12b69a94f743b345655ec751d8aada3c0c0f4d57cf0d2a00ab20ec587fe409"></a>CYHAL_QSPI_IRQ_RECEIVE_DONE&#160;</td><td class="fielddoc"><p >Async receive done. </p>
</td></tr>
</table>

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</div>
<a id="gac30267a66618a021ee34be687fa1442c" name="gac30267a66618a021ee34be687fa1442c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac30267a66618a021ee34be687fa1442c">&#9670;&nbsp;</a></span>cyhal_qspi_datarate_t</h2>

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<p>QSPI data rate. </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="ggac30267a66618a021ee34be687fa1442cac5b17b7596a02b09061b622a7a379cdc" name="ggac30267a66618a021ee34be687fa1442cac5b17b7596a02b09061b622a7a379cdc"></a>CYHAL_QSPI_DATARATE_SDR&#160;</td><td class="fielddoc"><p >Single data rate. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggac30267a66618a021ee34be687fa1442caf4476393b48f5854485d555186b6ee52" name="ggac30267a66618a021ee34be687fa1442caf4476393b48f5854485d555186b6ee52"></a>CYHAL_QSPI_DATARATE_DDR&#160;</td><td class="fielddoc"><p >Double data rate. </p>
</td></tr>
</table>

</div>
</div>
<h2 class="groupheader">Function Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#ga2ef047225a5818541a93a5a1a2039a0b">&#9670;&nbsp;</a></span>cyhal_qspi_init()</h2>

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          <td class="memname"><a class="el" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a> cyhal_qspi_init </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *&#160;</td>
          <td class="paramname"><em>obj</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#ga707195ce0627016bf371643bdd9caa51">cyhal_gpio_t</a>&#160;</td>
          <td class="paramname"><em>sclk</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__slave__pin__config__t">cyhal_qspi_slave_pin_config_t</a> *&#160;</td>
          <td class="paramname"><em>pin_set</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>hz</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>mode</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__clock__t">cyhal_clock_t</a> *&#160;</td>
          <td class="paramname"><em>clk</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Initialize QSPI peripheral. </p>
<p >It should initialize QSPI pins (io0-io7, sclk and ssel), set frequency, clock polarity and phase mode. The clock for the peripheral should be enabled</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[out]</td><td class="paramname">obj</td><td>Pointer to a QSPI object. The caller must allocate the memory for this object but the init function will initialize its contents. </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">sclk</td><td>The clock pin </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">pin_set</td><td>Set of pins, that will primarily be used for communication with memory. Depends on device, QSPI HAL can service multiple memories which can be registered and controlled using <a class="el" href="group__group__hal__qspi.html#gad5c89472279e1db26d2038bae0bf2e82">cyhal_qspi_slave_configure</a> and <a class="el" href="group__group__hal__qspi.html#ga0a0ffa8e5c9c92289b4624616cc27803">cyhal_qspi_select_active_ssel</a> functions. There is no need to call <a class="el" href="group__group__hal__qspi.html#ga0a0ffa8e5c9c92289b4624616cc27803">cyhal_qspi_select_active_ssel</a> after this function - provided ssel pin as part of pin_set parameter become active. </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">hz</td><td>The bus frequency </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">mode</td><td>Clock polarity and phase mode (0 - 3) </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">clk</td><td>The clock to use can be shared, if not provided a new clock will be allocated </td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>QSPI HAL cannot make changes into provided clock configuration. In this case <a class="el" href="group__group__hal__qspi.html#ga67150e1497b4547854d48b23deb8fd47">cyhal_qspi_set_frequency</a> function cannot be used and will return error once called. With provided clock only user application can configure QSPI bus frequency by configuring parameters of shared clock. </dd></dl>
<dl class="section return"><dt>Returns</dt><dd>The status of the init request </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga885169c7f722ebc20317441f9f91bc90">&#9670;&nbsp;</a></span>cyhal_qspi_init_cfg()</h2>

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          <td class="paramtype"><a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *&#160;</td>
          <td class="paramname"><em>obj</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const <a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__configurator__t">cyhal_qspi_configurator_t</a> *&#160;</td>
          <td class="paramname"><em>cfg</em>&#160;</td>
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          <td></td>
          <td>)</td>
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<p>Initialize the QSPI peripheral using a configurator generated configuration struct. </p>
<p >This function may not support all features, that can be configured via configurator. For limitations list please refer to <a class="el" href="group__group__hal__impl__qspi.html#section_hal_impl_qspi_init_cfg">Configurator-generated features limitations</a> section.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">obj</td><td>The QSPI peripheral to configure </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">cfg</td><td>Configuration structure generated by a configurator. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The status of the operation </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga14906073e688d345f01f880f9400bba3">&#9670;&nbsp;</a></span>cyhal_qspi_free()</h2>

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          <td class="memname">void cyhal_qspi_free </td>
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<p>Deinitilize QSPI peripheral. </p>
<p >It should release pins that are associated with the QSPI object, and disable clocks for QSPI peripheral module that was associated with the object</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in,out]</td><td class="paramname">obj</td><td>QSPI object </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ga67150e1497b4547854d48b23deb8fd47">&#9670;&nbsp;</a></span>cyhal_qspi_set_frequency()</h2>

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          <td class="memname"><a class="el" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a> cyhal_qspi_set_frequency </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *&#160;</td>
          <td class="paramname"><em>obj</em>, </td>
        </tr>
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          <td class="paramkey"></td>
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          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>hz</em>&#160;</td>
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<p>Set the QSPI baud rate. </p>
<p >Actual frequency may differ from the desired frequency due to available dividers and the bus clock. Function will apply achieved frequency only if it is in +0% /-10% deviation bounds from desired. Use <a class="el" href="group__group__hal__qspi.html#ga7d779256e9226180b2f6aa8f6af0bcab">cyhal_qspi_get_frequency</a> function to get actual frequency value that was achieved and set.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">obj</td><td>The QSPI object to configure </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">hz</td><td>The baud rate in Hz </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The status of the set_frequency request </dd></dl>

</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ga7d779256e9226180b2f6aa8f6af0bcab">&#9670;&nbsp;</a></span>cyhal_qspi_get_frequency()</h2>

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          <td class="memname">uint32_t cyhal_qspi_get_frequency </td>
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<p>Get the actual frequency that QSPI is configured for. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">obj</td><td>The QSPI object </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Frequency in Hz </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gad5c89472279e1db26d2038bae0bf2e82">&#9670;&nbsp;</a></span>cyhal_qspi_slave_configure()</h2>

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          <td class="memname"><a class="el" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a> cyhal_qspi_slave_configure </td>
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          <td class="paramtype"><a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *&#160;</td>
          <td class="paramname"><em>obj</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__slave__pin__config__t">cyhal_qspi_slave_pin_config_t</a> *&#160;</td>
          <td class="paramname"><em>pin_set</em>&#160;</td>
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<p>Configure provided set of pins to service additional slave memory. </p>
<p >Multiple pins can be configured as QSPI slave select pins as well as IO pins may be (or may not be) shared and used to service multiple connected slave memories. This function can be called multiple times - each call for each additional slave memory. Please refer to device datasheet for details. Switching between configured slave select pins is done by <a class="el" href="group__group__hal__qspi.html#ga0a0ffa8e5c9c92289b4624616cc27803">cyhal_qspi_select_active_ssel</a> function. Unless modified with this function, the SSEL pin provided as part of <a class="el" href="group__group__hal__qspi.html#ga2ef047225a5818541a93a5a1a2039a0b">cyhal_qspi_init</a> is the default. Please refer to <a class="el" href="group__group__hal__qspi.html#subsection_qspi_snippet_5">Code Snippet 5: Configuring multiple memories</a> for example of configuration multiple memory devices and switching between them. </p><dl class="section note"><dt>Note</dt><dd>Provided IO pins can overlap with those, that are configured in scope of <a class="el" href="group__group__hal__qspi.html#ga2ef047225a5818541a93a5a1a2039a0b">cyhal_qspi_init</a> function. </dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">obj</td><td>The QSPI object to configure </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">pin_set</td><td>Set of pins, that will be used to service additional slave memory. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The status of pin configuration </dd></dl>

</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ga0a0ffa8e5c9c92289b4624616cc27803">&#9670;&nbsp;</a></span>cyhal_qspi_select_active_ssel()</h2>

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          <td class="memname"><a class="el" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a> cyhal_qspi_select_active_ssel </td>
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          <td class="paramtype"><a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *&#160;</td>
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<p>Selects an active slave select (SSEL) line from one of available and previously configured. </p>
<p >Slave memories (in addition to one, that was configured in scope of <a class="el" href="group__group__hal__qspi.html#ga2ef047225a5818541a93a5a1a2039a0b">cyhal_qspi_init</a>) can be added with help of <a class="el" href="group__group__hal__qspi.html#gad5c89472279e1db26d2038bae0bf2e82">cyhal_qspi_slave_configure</a> function. </p><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">obj</td><td>The QSPI object to configure </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">ssel</td><td>SSEL pin to be set as active </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>CY_RSLT_SUCCESS if slave select was switched successfully, otherwise - CYHAL_QSPI_RSLT_ERR_CANNOT_SWITCH_SSEL </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gaa82f8a18f5936ff7323d72574165190a">&#9670;&nbsp;</a></span>cyhal_qspi_read()</h2>

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          <td class="memname"><a class="el" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a> cyhal_qspi_read </td>
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          <td class="paramtype"><a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *&#160;</td>
          <td class="paramname"><em>obj</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__command__t">cyhal_qspi_command_t</a> *&#160;</td>
          <td class="paramname"><em>command</em>, </td>
        </tr>
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          <td class="paramkey"></td>
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          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>address</em>, </td>
        </tr>
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          <td class="paramkey"></td>
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          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>data</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">size_t *&#160;</td>
          <td class="paramname"><em>length</em>&#160;</td>
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          <td></td>
          <td>)</td>
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<p>Receive a command and block of data, synchronously. </p>
<p >This will read either <code>length</code> bytes or the number of bytes that are currently available in the receive buffer, whichever is less, then return. The value pointed to by <code>length</code> will be updated to reflect the number of bytes that were actually read.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">obj</td><td>QSPI object </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">command</td><td>QSPI command </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">address</td><td>Address to access to </td></tr>
    <tr><td class="paramdir">[out]</td><td class="paramname">data</td><td>RX buffer </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">length</td><td>RX buffer length in bytes </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The status of the read request </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga734bbcfd805a4e0f0327a8a903c43c90">&#9670;&nbsp;</a></span>cyhal_qspi_read_async()</h2>

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          <td class="paramtype"><a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *&#160;</td>
          <td class="paramname"><em>obj</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__command__t">cyhal_qspi_command_t</a> *&#160;</td>
          <td class="paramname"><em>command</em>, </td>
        </tr>
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          <td class="paramname"><em>address</em>, </td>
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          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>data</em>, </td>
        </tr>
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          <td class="paramtype">size_t *&#160;</td>
          <td class="paramname"><em>length</em>&#160;</td>
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          <td></td>
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<p>Receive a command and block of data in asynchronous mode. </p>
<p >This will transfer <code>length</code> bytes into the buffer pointed to by <code>data</code> in the background. When the requested quantity of data has been read, the <a class="el" href="group__group__hal__qspi.html#ggadae12b69a94f743b345655ec751d8aada3c0c0f4d57cf0d2a00ab20ec587fe409">CYHAL_QSPI_IRQ_RECEIVE_DONE</a> event will be raised. See <a class="el" href="group__group__hal__qspi.html#ga3650436f640ed3e7640dafaa90268700">cyhal_qspi_register_callback</a> and <a class="el" href="group__group__hal__qspi.html#ga133e886b33443ee76ad7239623290079">cyhal_qspi_enable_event</a>.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">obj</td><td>QSPI object </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">command</td><td>QSPI command </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">address</td><td>Address to access to </td></tr>
    <tr><td class="paramdir">[out]</td><td class="paramname">data</td><td>RX buffer </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">length</td><td>RX buffer length in bytes </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The status of the read request </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga3f3229928c764a4376032b41a63c2f35">&#9670;&nbsp;</a></span>cyhal_qspi_write()</h2>

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          <td class="paramtype"><a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *&#160;</td>
          <td class="paramname"><em>obj</em>, </td>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__command__t">cyhal_qspi_command_t</a> *&#160;</td>
          <td class="paramname"><em>command</em>, </td>
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          <td class="paramname"><em>address</em>, </td>
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          <td class="paramtype">const void *&#160;</td>
          <td class="paramname"><em>data</em>, </td>
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<p>Send a command and block of data, synchronously. </p>
<p >This will write either <code>length</code> bytes or until the write buffer is full, whichever is less, then return. The value pointed to by <code>length</code> will be updated to reflect the number of bytes that were actually written.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">obj</td><td>QSPI object </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">command</td><td>QSPI command </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">address</td><td>Address to access to </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">data</td><td>TX buffer </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">length</td><td>TX buffer length in bytes </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The status of the write request </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga9521128b942f52fe2146cac081d48d02">&#9670;&nbsp;</a></span>cyhal_qspi_write_async()</h2>

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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__command__t">cyhal_qspi_command_t</a> *&#160;</td>
          <td class="paramname"><em>command</em>, </td>
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          <td class="paramtype">const void *&#160;</td>
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          <td></td>
          <td class="paramtype">size_t *&#160;</td>
          <td class="paramname"><em>length</em>&#160;</td>
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        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>Send a command and block of data in asynchronous mode. </p>
<p >This will transfer <code>length</code> bytes into the tx buffer in the background. When the requested quantity of data has been queued in the transmit buffer, the <a class="el" href="group__group__hal__qspi.html#ggadae12b69a94f743b345655ec751d8aadab1b4499185f082601c68a36c6be0d034">CYHAL_QSPI_IRQ_TRANSMIT_DONE</a> event will be raised. See <a class="el" href="group__group__hal__qspi.html#ga3650436f640ed3e7640dafaa90268700">cyhal_qspi_register_callback</a> and <a class="el" href="group__group__hal__qspi.html#ga133e886b33443ee76ad7239623290079">cyhal_qspi_enable_event</a>.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">obj</td><td>QSPI object </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">command</td><td>QSPI command </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">address</td><td>Address to access to </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">data</td><td>TX buffer </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">length</td><td>TX buffer length in bytes </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The status of the write request </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gad3d0ba591bae66de98b2eac59b915ed1">&#9670;&nbsp;</a></span>cyhal_qspi_transfer()</h2>

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          <td class="memname"><a class="el" href="group__group__result.html#gaca79700fcc701534ce61778a9bcf57d1">cy_rslt_t</a> cyhal_qspi_transfer </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *&#160;</td>
          <td class="paramname"><em>obj</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const <a class="el" href="group__group__hal__qspi.html#structcyhal__qspi__command__t">cyhal_qspi_command_t</a> *&#160;</td>
          <td class="paramname"><em>command</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>address</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const void *&#160;</td>
          <td class="paramname"><em>tx_data</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">size_t&#160;</td>
          <td class="paramname"><em>tx_size</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>rx_data</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">size_t&#160;</td>
          <td class="paramname"><em>rx_size</em>&#160;</td>
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          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Send a command (and optionally data) and get the response. </p>
<p >Can be used to send/receive device specific commands</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">obj</td><td>QSPI object </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">command</td><td>QSPI command </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">address</td><td>Address to access to </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">tx_data</td><td>TX buffer </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">tx_size</td><td>TX buffer length in bytes </td></tr>
    <tr><td class="paramdir">[out]</td><td class="paramname">rx_data</td><td>RX buffer </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">rx_size</td><td>RX buffer length in bytes </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The status of the transfer request </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga3650436f640ed3e7640dafaa90268700">&#9670;&nbsp;</a></span>cyhal_qspi_register_callback()</h2>

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          <td class="memname">void cyhal_qspi_register_callback </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *&#160;</td>
          <td class="paramname"><em>obj</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__group__hal__qspi.html#ga42887dff6257345711b353990edb1ab1">cyhal_qspi_event_callback_t</a>&#160;</td>
          <td class="paramname"><em>callback</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>callback_arg</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Register a QSPI event handler. </p>
<p >This function will be called when one of the events enabled by <a class="el" href="group__group__hal__qspi.html#ga133e886b33443ee76ad7239623290079">cyhal_qspi_enable_event</a> occurs.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">obj</td><td>The QSPI object </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">callback</td><td>The callback handler which will be invoked when the interrupt fires </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">callback_arg</td><td>Generic argument that will be provided to the handler when called </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga133e886b33443ee76ad7239623290079">&#9670;&nbsp;</a></span>cyhal_qspi_enable_event()</h2>

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          <td class="memname">void cyhal_qspi_enable_event </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="group__group__hal__impl__hw__types.html#structcyhal__qspi__t">cyhal_qspi_t</a> *&#160;</td>
          <td class="paramname"><em>obj</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__group__hal__qspi.html#gadae12b69a94f743b345655ec751d8aad">cyhal_qspi_event_t</a>&#160;</td>
          <td class="paramname"><em>event</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>intr_priority</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Configure QSPI interrupt enablement. </p>
<p >When an enabled event occurs, the function specified by <a class="el" href="group__group__hal__qspi.html#ga3650436f640ed3e7640dafaa90268700">cyhal_qspi_register_callback</a> will be called.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">obj</td><td>The QSPI object </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">event</td><td>The QSPI event type </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">intr_priority</td><td>The priority for NVIC interrupt events </td></tr>
    <tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>True to turn on interrupts, False to turn off </td></tr>
  </table>
  </dd>
</dl>

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